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What Is 1588v2?

1588v2, also called Precision Time Protocol Version 2 (PTPv2), is a precision clock synchronization protocol for networked measurement and control systems. 1588v2 is an industry standard released by IEEE for high-precision time synchronization and frequency synchronization between devices. Compared with the Network Time Protocol (NTP), 1588v2 provides sub-microsecond-level time synchronization precision by leveraging the advantage of hardware timestamping, meeting the time synchronization requirements of wireless base stations. 1588v2 has advantages in cost, maintenance, and security over the traditional GPS high-precision time synchronization solution, making it the most popular time synchronization protocol in the industry.

Contents

What Is Synchronization?

Synchronization refers to a state where two or more signals maintain a certain relationship in frequency or phase, meaning that the frequency or phase difference between two or more signals remains within a permitted range at a valid instant. Synchronization includes frequency synchronization and time synchronization.

Frequency synchronization, also known as clock synchronization, refers to a strict relationship between signals based on a constant frequency or phase difference, in which signals are sent or received at the same average rate at a valid instant. In this manner, all devices on the communications network operate at the same rate, with the phase difference between signals remaining at a fixed value.
Time synchronization, also known as phase synchronization, refers to the consistency of phases between signals. This means that the phase or time difference between signals is always zero or remains within the specified range. Generally, to achieve time synchronization between two devices, frequency synchronization must be achieved between the two devices.

The following figure uses two watches as an example to show the difference between time synchronization and frequency synchronization. In time synchronization, Watch A and Watch B always keep the same time. In frequency synchronization, Watch A and Watch B keep different time, but the time difference between the two watches is a constant value, for example, 6 hours.

Time synchronization and frequency synchronization

Why Do We Need 1588v2?

On IP radio access networks (RANs), frequency needs to be synchronized among base stations of all wireless standards, and frequencies between different base stations must be synchronized to a certain level of precision; otherwise, calls may be dropped during mobile handoffs. Some wireless standards that use a time division duplex (TDD) mechanism — such as TD-SCDMA, CDMA2000, LTE-TDD, and 5G NR TDD — require precise time synchronization in addition to frequency synchronization. They also require that the precision of time synchronization between any two base stations be less than 3 μs, or the time difference between each base station and the standard time source be within ±1.5 μs. In addition, the emergence of value-added services such as CoMP, E-MBMS, eICIC, and CA on wireless mobile networks also requires time synchronization between base stations. Traditional time synchronization solutions are as follows:

Satellite-based time synchronization: Satellite antennas are installed in each base station to obtain accurate time from the GPS or BeiDou satellite. However, the satellite antennas in this solution have numerous problems, such as difficult installation, site selection, and maintenance, high costs, and high security risks. For example, satellite signals are vulnerable to interference and spoofing, giving rise to security problems.
NTP time synchronization: An NTP time server is deployed on the network side to provide time for each base station through NTP packets. The biggest disadvantage of this solution is that it can achieve only millisecond-level time precision, yet wireless base stations require microsecond-level time precision.

To overcome the disadvantages of the preceding two solutions, a terrestrial transmission solution for high-precision time synchronization is required. 1588v2 implements 1588v2 (PTP) packet transmission through optical fibers or cables, preventing security problems. In addition, with the advantage of hardware timestamping, 1588v2 can achieve time synchronization with a precision of sub-microseconds, meeting the ±1.5 μs precision requirement of wireless base stations and making it the most popular time synchronization protocol in the industry.

1588v2 Development History

IEEE released 1588v1 in 2002, aiming to meet the requirements for precise time control in the industrial field. As 1588v1 gained wide application in the industrial control field and the telecommunications network field required high-precision time synchronization, IEEE released 1588v2 in 2008 (1588v2 is therefore also called IEEE 1588-2008). The latest version is 1588v2.1, which was released in 2019 (also called IEEE 1588-2019). The following table lists the changes and compatibility of the 1588 versions.

Table 1-1 Changes and compatibility of 1588 versions

Version	Release Time	Change	Compatibility
1588v1 (IEEE 1588-2002)	2002	-	-
1588v2 (IEEE 1588-2008)	2008	1588v2 has the following changes over 1588v1: Provides higher precision. Hardware timestamping is defined to achieve sub-microsecond-level precision. Implements faster Sync packet transmission. Introduces the transparent clock (TC) model. Uses shorter PTP packets and supports new packets such as unicast negotiation packets and P2P delay packets. Uses type-length-value (TLV) extension to enhance protocol features and functions.	Incompatible with 1588v1
1588v2.1 (IEEE 1588-2019)	2019	1588v2.1 has the following changes over 1588v2: Provides wider compatibility, allowing a network to provide different time for different applications. Provides higher security. Provides the performance monitoring function.	Compatible with 1588v2, but incompatible with 1588v1

Version

Release Time

Change

Compatibility

1588v1 (IEEE 1588-2002)

2002

1588v2 (IEEE 1588-2008)

2008

1588v2 has the following changes over 1588v1:

Provides higher precision. Hardware timestamping is defined to achieve sub-microsecond-level precision.
Implements faster Sync packet transmission.
Introduces the transparent clock (TC) model.
Uses shorter PTP packets and supports new packets such as unicast negotiation packets and P2P delay packets.
Uses type-length-value (TLV) extension to enhance protocol features and functions.

Incompatible with 1588v1

1588v2.1 (IEEE 1588-2019)

2019

1588v2.1 has the following changes over 1588v2:

Provides wider compatibility, allowing a network to provide different time for different applications.
Provides higher security.
Provides the performance monitoring function.

Compatible with 1588v2, but incompatible with 1588v1

Although IEEE 1588 defines the basic functions of the protocol, 1588 industry standards need to be redefined based on the time synchronization solution and synchronization precision requirements of each industry to ensure interconnectivity.

1588v2 has enhanced features compared with 1588v1 and has now largely replaced 1588v1. 1588v2 has been applied in many fields.

Application fields of 1588v2

Telecommunications field: To address the synchronization requirements of wireless base stations on 4G and 5G networks, the International Telecommunication Union (ITU) defines a series of standards, including ITU-T G.826x for frequency synchronization and ITU-T G.827x for time synchronization. Among these standards, ITU-T G.8275.1 is defined for 1588v2 time synchronization to ensure interconnectivity between devices from different vendors. In addition, the China Communications Standards Association (CCSA) defines the 1588v2 standard CCSA YD/T-2375 for Chinese carriers based on their requirements and network structures.
Industrial field: To ensure automatic production on industrial automation networks, industrial terminals must have a unified time, and high-precision time synchronization must be achieved between them. Currently, there are two 1588v2 industrial network standards in the industry: IEEE 802.1AS and IEC 62439-3.
Electric power field: In scenarios such as relay protection and timely fault recovery of electric power networks, high-precision time synchronization between electric power devices is required to ensure quick fault recovery. Two 1588v2 standards — IEEE C37.238 and IEC 61850-9-3 — have been defined, providing an Ethernet communication architecture for the electric power industry.
Media network: As HD video rebroadcasting requires high bandwidth, media networks (such as CCTV networks) are undergoing a transformation from traditional serial digital interface (SDI) networks to IP networks. Therefore, IP networks are used to transmit 1588v2 packets to media terminals, ensuring HD video rebroadcasting on the terminals. Currently, two industry standards are available: SMPTE ST-2059 and AES 67.
Data center: To implement distributed data computing, data centers also require high-precision time synchronization. Currently, there is no formal standard in the industry. However, Meta has formulated the open-source standard OCP-PTP for 1588v2 in data centers.
Automotive: Intelligent vehicles and autonomous driving also require high-precision time synchronization for network modules inside vehicles. Avnu Alliance has formulated the AutoSar-PTP standard for 1588v2 in the automotive industry.

How Does 1588v2 Implement Synchronization?

Each node on a time synchronization network is called a clock. 1588v2 defines the following types of clocks:

Ordinary clock (OC)
An OC has only one physical interface to communicate with the network. An OC can function as a grandmaster clock (the highest-level clock) to distribute time to downstream clocks, or function as a slave clock to synchronize time with an upstream clock. Generally, the 1588 server is configured to work in OC mode as the grandmaster clock of the entire network. A user terminal (such as a wireless base station) is also configured to work in OC mode as a slave clock.
Boundary clock (BC)
A BC has multiple physical interfaces to communicate with the network. The BC uses one of these interfaces to synchronize time with an upstream clock and uses the other interfaces to distribute time to downstream clocks.
Transparent clock (TC)
A TC has multiple physical interfaces to communicate with the network. Through these interfaces, the TC processes and forwards 1588v2 (PTP) packets, but does not synchronize time with any clock. TCs can be either end-to-end (E2E) TCs or peer-to-peer (P2P) TCs.

When forwarding 1588v2 packets, an E2E TC measures the packet forwarding delay and corrects any such delay in the 1588v2 packets. Then, the OCs or BCs at both ends calculate the link delay and time offset for synchronization. Compared with an E2E TC, a P2P TC not only corrects the forwarding delay, but also measures and corrects the delay of the link connected to each interface of the clock. Then, the OCs or BCs at both ends calculate the time offset for synchronization.

The following figure shows an example of the hierarchical topology of the three basic clocks.

Example of the hierarchical topology of three basic clocks

1588v2 network synchronization involves establishing the master/slave hierarchy on the control plane and implementing frequency/time synchronization on the service plane.

Establishing the master/slave hierarchy: In a clock domain, each OC or BC determines its reference source and the status of each interface (master/slave) through the best master clock (BMC) algorithm based on the clock source information carried in the Announce packets of each interface. The master/slave hierarchy and tracing path are then established for the entire synchronization network.
Implementing frequency/time synchronization: After the master/slave hierarchy and tracing path are established, the master and slave clocks exchange Sync, Delay_Req, Delay_Resp, and other types of event packets. As a result of this exchange, the slave clock can calculate the time offset between itself and the master clock, and adjusts its own time to synchronize with the master clock, implementing frequency/time synchronization.

How Does 1588v2 Establish the Master/Slave Hierarchy?

Generally, a 1588v2 network uses the BMC algorithm to dynamically establish the master/slave hierarchy. The BMC algorithm, defined in 1588v2, is used to determine the master/slave relationship among clocks on a network. It compares the time source information (carried in Announce packets) of multiple clocks to determine which clock is better. Clocks on the network are classified as either master or slave clocks. Slave clocks trace the frequency or time of the master clock. When the network topology or the attribute of a clock source changes, the algorithm selects a new grandmaster clock so that clocks and time are synchronized on the entire network.

For each clock, the BMC algorithm advertises the clock source information on each interface through Announce packets, maintains local clock data, selects the best time source, and determines the interface status.

For the network, the BMC algorithm establishes the master/slave synchronization hierarchy of clocks on the entire network, determines the master/slave relationship between all clocks, and finally establishes a fully connected loop-free spanning tree with the grandmaster clock as the root. The grandmaster clock is the best clock source on the entire network.

How Does 1588v2 Implement Time Synchronization?

1588v2 defines two time synchronization mechanisms: E2E and P2P. On a 1588v2-capable network, the master clock can be connected to the slave clock either directly or through intermediate clocks. The E2E and P2P mechanisms measure the total link delay between the master and the slave clocks in different ways:

The E2E mechanism measures the total link delay between two OCs or BCs, including all intermediate TCs between them.
The P2P mechanism measures only the hop-by-hop link delay between two directly connected OCs, BCs, or TCs.

E2E mechanism:

In the E2E mechanism, the master and slave clocks exchange Sync, Delay_Req, and Delay_Resp packets so that the slave clock can calculate the time offset between itself and the master clock and adjust its time to synchronize with the master clock. The master clock can send a Sync packet in either one-step or two-step mode. In one-step mode, the Sync packet carries the sending timestamp. In two-step mode, the Sync packet does not carry the sending timestamp. Instead, the Sync packet records only the sending time. The Follow_Up packet carries the sending timestamp.

The following figure shows the time synchronization process using the E2E mechanism.

Time synchronization using the E2E mechanism

The master clock sends a Sync packet (and a Follow_Up packet if the two-step mode is used) at t1 and carries the timestamp t1 in the Sync packet (or the Follow_Up packet if the two-step mode is used).
The slave clock receives the Sync packet at t2, generates the timestamp t2, and extracts the timestamp t1 from the received packet.
The slave clock sends a Delay_Req packet at t3 and generates the timestamp t3.
The master clock receives the Delay_Req packet at t4, generates the timestamp t4, inserts the timestamp t4 into a Delay_Resp packet, and sends the Delay_Resp packet to the slave clock.
The slave clock receives the Delay_Resp packet and extracts the timestamp t4 from the received packet. In this way, the slave clock obtains a set of timestamps, namely, t1, t2, t3, and t4.

Assume that the link delay from the master clock to the slave clock is t-ms, the link delay from the slave clock to the master clock is t-sm, and the time offset between the slave and master clocks is Offset.

t2 – t1 = t-ms + Offset

t4 – t3 = t-sm – Offset

(t2 – t1) – (t4 – t3) = (t-ms + Offset) – (t-sm – Offset)

Therefore, Offset is [(t2 – t1) – (t4 – t3) – (t-ms – t-sm)]/2.

If t-ms = t-sm, that is, the bidirectional delays on the link between the master and slave clocks are symmetrical, then:

Offset = [(t2 – t1) – (t4 – t3)]/2

In this way, the slave clock can calculate the offset between itself and the master clock based on the four timestamps t1, t2, t3, and t4, and then adjust the offset to implement time synchronization between the slave clock and the master clock.

According to these principles, it can be inferred that 1588v2 time synchronization is based on link delay symmetry between the master and slave clocks. If the bidirectional delays on the link between the master and slave clocks are asymmetric, a synchronization error is introduced. The offset is half of the difference between the delays in the two directions. Therefore, for some high-precision synchronization scenarios, the asymmetry of bidirectional delays on the link between the master and slave clocks needs to be compensated.

P2P mechanism:

In the P2P mechanism, no distinguishing is made between the master and slave clocks. Each clock exchanges P2P packets with its adjacent clock so that each clock can calculate the link delay between itself and its adjacent clock. Each clock can send packets in one-step or two-step mode. In one-step mode, a Pdelay_Resp packet carries the sending timestamp. In two-step mode, a Pdelay_Resp packet does not carry the sending timestamp, but only records the sending time. The sending timestamp is carried in the subsequent Pdelay_Resp_Follow_Up packet.

The following figure shows how the link delay of two directly connected clocks is calculated in the P2P mechanism.

Link delay calculation in the P2P mechanism

Clock 2 sends a Pdelay_Req packet at t1.
Clock 1 receives the Pdelay_Req packet at t2 and generates a receiving timestamp t2 of the Pdelay_Req packet.
Clock 1 sends a Pdelay_Resp packet at t3 and generates a sending timestamp t3 of the Pdelay_Resp packet.
1. In one-step mode, the offset (t3 – t2) is carried in the Pdelay_Resp packet.
2. In two-step mode, the offset (t3 – t2) is carried in the Pdelay_Resp_Follow_Up packet, or t2 is carried in the Pdelay_Resp packet and t3 is carried in the Pdelay_Resp_Follow_Up packet.
Clock 2 receives the Pdelay_Resp packet at t4 and generates the timestamp t4 locally. Finally, Clock 2 obtains a set of timestamps, namely, t1, t2, t3, and t4.

Assume that the link delay from Clock 2 to Clock 1 is t-reqresp, and the link delay from Clock 1 to Clock 2 is t-respreq. The total two-way delay of the link from Clock 2 to Clock 1 is calculated as follows:

(t-reqresp + t-respreq) = (t4 – t1) – (t3 – t2)

If t-reqresp = t-respreq, that is, the bidirectional delays on the link between Clock 2 and Clock 1 are symmetrical, the average link delay between Clock 2 and Clock 1 is calculated as follows:

MeanPathDelay = [(t4 – t1) – (t3 – t2)]/2

In the preceding process, the link delay is calculated and updated in real time, but time synchronization is not performed. For time synchronization, Sync packets must be sent from the master clock to the slave clock (as shown in the following figure). Specifically, the master clock periodically sends a Sync packet to the slave clock, which obtains two timestamps, namely, t5 and t6. The offset between the slave clock and the master clock is as follows:

Offset = t6 – t5 – MeanPathDelay

Based on the time offset, the slave clock can adjust the local time to synchronize its time with the master clock.

Time synchronization using the P2P mechanism

How Does 1588v2 Implement Frequency Synchronization?

1588v2 implements frequency synchronization by exchanging Sync packets between master and slave clocks. The master clock periodically sends Sync packets to the slave clock. If the frequency of the slave clock is synchronized to that of the master clock, the accumulative time offsets within the same time periods are the same, as long as the path delay changes are neglected.

t2(1) – t2(0) = t1(1) – t1(0)

t2(2) – t2(1) = t1(2) – t1(1)

t2(3) – t2(2) = t1(3) – t1(2)

...

t2(n) – t2(n – 1) = t1(n) – t1(n – 1)

If the (t2(n) – t2(n – 1)) value is greater than the (t1(n) – t1(n – 1)) value, the frequency of the slave clock is higher than that of the master clock and needs to be reduced. If the (t2(n) – t2(n – 1)) value is smaller than the (t1(n) – t1(n – 1)) value, the frequency of the slave clock needs to increased. The frequency offset is calculated as follows:

Foffset = [t1(n) – t1(n – 1)]/[t2(n) – t2(n – 1)] – 1

The following figure shows the 1588v2 frequency synchronization process.

1588v2-based frequency synchronization

1588v2 Application Scenarios

To ensure synchronization precision, 1588v2 is applied on a hop-by-hop basis. This means that all devices on a link must support 1588v2. Common 1588v2 application scenarios include 1588v2 hop-by-hop frequency synchronization and 1588v2 hop-by-hop time synchronization.

1588v2 Hop-by-Hop Frequency Synchronization

1588v2 frequency synchronization (packet-layer frequency synchronization) and synchronous Ethernet (SyncE, physical-layer frequency synchronization) can be used together on a network. The following figure shows a scenario where a mobile transport network implements frequency synchronization for gNodeBs. Only frequency synchronization is required between gNodeBs. In this scenario, gNodeB 1 supports 1588v2, and gNodeB 2 does not support 1588v2.

1588v2 hop-by-hop frequency synchronization

Based on network links' support for frequency synchronization technologies, the frequency synchronization network can be deployed as follows:

The external clock source provides frequency information for connected devices through SyncE (or external clock, which is also a physical-layer frequency synchronization technology, where the interface is a dedicated clock interface that transmits only frequency signals and does not transmit service data).
Frequency information is transmitted through the synchronous digital hierarchy (SDH) or SyncE over physical links. On lines that do not support SDH or SynE, 1588v2 is used to transmit frequency information.

Finally, the gNodeBs can achieve frequency synchronization with the external clock sources, thereby implementing frequency synchronization between the gNodeBs.

1588v2 Hop-by-Hop Time Synchronization

The following figure shows a scenario where a mobile transport network implements time synchronization for gNodeBs. Time synchronization is required between gNodeBs. In this scenario, gNodeB 1 and gNodeB 3 support 1588v2, and gNodeB 2 does not support 1588v2.

1588v2 hop-by-hop time synchronization

Based on network links' support for frequency synchronization technologies, the time synchronization network can be deployed as follows:

The external time source imports time to transport network devices. The transport network devices, as BCs, recover the time hop by hop. The gNodeBs, as OCs, obtain time from the transport network devices. If the external time source does not support 1588v2, external time interfaces (such as 1PPS+ToD interfaces) can provide time signals for the transport network devices.
gNodeB 2 that does not support 1588v2 needs to be configured with a GPS/BeiDou receiver to obtain high-precision time.

Finally, the gNodeBs can achieve time synchronization with the external time sources, thereby implementing time synchronization between the gNodeBs.

Acronyms and Abbreviations

Table 1-2 Acronyms and abbreviations

Acronym or Abbreviation	Full Name
BITS	Building Integrated Timing Supply
CA	Carrier Aggregation
CCSA	China Communications Standards Association
CDMA2000	Code Division Multiple Access 2000
CoMP	Coordinated Multiple Points
eICIC	Enhanced Inter-cell Interference Coordination
E-MBMS	Enhanced Multimedia Broadcast Multicast Service
GPS	Global Position System
LTE-TDD	Long Term Evolution Time Division Duplex
ITU	International Telecommunication Union
NTP	Network Time Protocol
RAN	Radio Access Network
SDI	Serial Digital Interface
TDD	Time Division Duplex
TD-SCDMA	Time Division-Synchronous Code Division Multiple Access
ToD	Time of Day
1PPS	One Pulse Per Second
5G NR TDD	5G New Radio Time Division Duplex

References

1Configuring 1588v2 (NetEngine Routers)

About This Topic

Author： Wang Jing
Updated on： 2023-12-07
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